JPH0361700U - - Google Patents
Info
- Publication number
- JPH0361700U JPH0361700U JP12185789U JP12185789U JPH0361700U JP H0361700 U JPH0361700 U JP H0361700U JP 12185789 U JP12185789 U JP 12185789U JP 12185789 U JP12185789 U JP 12185789U JP H0361700 U JPH0361700 U JP H0361700U
- Authority
- JP
- Japan
- Prior art keywords
- redundant
- memory cell
- circuit
- cell
- packaging
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004806 packaging method and process Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12185789U JPH0361700U (en]) | 1989-10-17 | 1989-10-17 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12185789U JPH0361700U (en]) | 1989-10-17 | 1989-10-17 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0361700U true JPH0361700U (en]) | 1991-06-17 |
Family
ID=31669878
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12185789U Pending JPH0361700U (en]) | 1989-10-17 | 1989-10-17 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0361700U (en]) |
-
1989
- 1989-10-17 JP JP12185789U patent/JPH0361700U/ja active Pending
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